The field of the present invention pertains to treatment of dielectric materials to improve the etching characteristics thereof, improved etching techniques resulting therefrom, and improved semiconductor devices.
As integrated circuits (IC""s) become more compact, dense and powerful, this necessarily also has decreased and continues to decrease the distances between adjacent components and interconnects. Due to this increasing density and the need for faster speeds, copper and copper alloys are again receiving attention as materials of choice for interconnects. Copper offers advantages over aluminum in that it has a lower resistivity than aluminum and exhibits superior electromigration properties.
Dual-damascene is a technique of inlaying metal for interconnects and wiring through the back end, which was developed due to difficulties presented in copper etch processes. The damascene process includes etching a trench with a high aspect ratio (e.g., approaching 6:1), filling the trench with copper, such as by electrochemical plating, for example, and them removing any overfill by chemical mechanical polishing (CMP), for example. The term xe2x80x9cdualxe2x80x9d refers to the formation of a via within the trench.
Currently, a hard mask formed of Si3N4 or SiC, for example, may be used to form an etch stop which defines the bottom of the trench and/or via as it is formed. Although this type of etch stop may be effective in simplifying the etch process during the formation of the trench and the via, these hard mask materials generally are characterized by a xe2x80x9ckxe2x80x9d value of around 5 to 7. Since the hard mask material remains after the etching process, the effective k value of the resulting dielectric stack is increased by the presence thereof, particularly when low k dielectrics are used.
Accordingly, there is a continuing need for better dielectric stacks with more density capacity and therefor a need for improved processes which lessen the effect of increasing the k value of the resultant dielectric stack.
An embodiment of the present invention provides a method of forming an interface to serve as an endpoint for an etching procedure. The method includes providing a substrate formed of a low k material, and transforming a surface layer of the substrate to chemically alter its structure, so that during etching, spectrographic monitoring will indicate when the etching process passes through an upper layer of low k material and into the transformed surface layer.
The transforming step may include subjecting the substrate to a plasma bombardment, where the plasma may be a nitrogen plasma, oxygen plasma, helium plasma, argon plasma or plasma formed from another inert gas.
The substrate may be a C-doped silicon material, where the transforming by a nitrogen plasma changes the surface layer from a Sixe2x80x94Cxe2x80x94O material to a material having a Sixe2x80x94Nxe2x80x94O, 
Such a transformed surface layer may be less than or equal to about 200xc3x85 thick and does not significantly change the k value of the material.
The substrate may also be treated by an oxygen plasma, wherein the surface layer is transformed into an oxide. The surface layer in this case exhibits a slightly higher k value than the substrate, but is still significantly lower than the k value of etch stop layers currently in use. Such an oxide surface layer may be less than or equal to about 500 xc3x85.
The substrate may also be treated by an helium plasma, or other plasma formed from an inert gas, e.g., argon wherein carbon atoms are knocked out of the surface layer to leave vacancies. While such a transformation generally lowers the k value of the surface layer, the practical effect, upon depositing another layer of low k material over the surface layer, is that the surface layer compresses to form a material with a slightly higher k value than the remainder of the layer. However, the k value is still significantly lower than the k value of etch stop layers currently in use.
A method of dual damascene processing is disclosed which includes depositing a low k material layer on an etch stop layer; transforming a surface layer of the low k material layer to alter the chemical composition thereof; and depositing an additional amount of the low k material over the transformed surface layer.
Additionally, the method may include etching a via through the additional low k material, the transformed surface layer and the low k material layer, and ending at an interface with the etch stop layer.
Further, a step of etching a trench through the additional low k material and ending at an interface with the transformed surface layer is provided. Both trench-first and via-first process are included in the present invention, as well as other dual damascene techniques.
Products made by the above methods, are also included, such as a product including a first layer of low k material having a transformed surface layer having a chemical formula different from a remainder of the first layer; and a second layer of low k material layer deposited over the transformed surface layer.
Such products are further described to include an etch stop layer, wherein the first layer of low k material has been deposited on the etch stop layer.
According to the present invention, a stacked layer structure is provided, which includes an etch stop layer; a low k material layer deposited on the etch stop layer and including a transformed surface layer having a chemical formula different from a remainder of the low k material layer; an additional low k material layer deposited over the transformed surface layer; a via passing through the additional low k material layer, the transformed surface layer and the low k material layer and terminating at an interface with the etch stop layer; and a trench passing through the additional low k material layer and terminating at an interface with the transformed surface layer.